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Mr. Deepjyoti Deb

Assistant Professor (O.G)

Department of Electronics & Communication Engineering

Contact Information

  • Ph.D (Pursuing), Tezpur University (2021- Present)
  • M.Tech (Electronics Design and Technology), Tezpur University, 2021
  • B.E (Electronics and Telecommunication), Assam Engineering College, Gauhati University, 2018

  • Solid State Devices
  • Analogue Circuits

  • Semiconductor devices
  • Micro-electronics,
  • Defects in Semiconductor devices
  • Interface Phenomena
  • Reliabilities in Semiconductor devices.

  • Deepjyoti Deb, Ratul Kr Baruah, Rupam Goswami., Scaling-Induced Noise Behavior in n-p-n SOI Double-Gate Tunnel FETs in presence of interface traps,” Phys. Scripta. (Accepted) 13 June 2025.
  • Deepjyoti Deb, Ratul Kr Baruah, Rupam Goswami., “Impact of incomplete ionization in presence of interface traps in p-i-n TFET and n-p-n double gate TFET”. Materials Science in Semiconductor Processing, May 2025. https://doi.org/10.1016/j.mssp.2025.109664
  • Deepjyoti Deb, Rupam Goswami, Ratul Kr Baruah., “Investigation of parametric variation, gate engineering, RF parameters and interface traps in SOI L-body double gate tunnel field effect transistor”. Materials Science and Engineering: B. 1;316:118127, Jun 2025. https://doi.org/10.1016/j.mseb.2025.118127
  • P Sohtun, Deepjyoti Deb, Neelam Bora, Rupam Goswami, P K Choudhury, P K Sarangi, R Boddula, Rupam Kataki, T A Kurniawan., “Agriculture biomass-derived carbon materials for their application in sustainable energy storage”. Carbon Letters. 4:1-33. Mar 2025. https://doi.org/10.1007/s42823-025-00884-9.
  • Himangshu Lahkar, Anurag Medhi, Deepjyoti Deb, Rajesh Saha, Ratul Kr Baruah, Rupam Goswami., “Statistical variability of physically localized interface traps in SOI npn DG TFETs”. Journal of Materials Science: Materials in Electronics. 36(6):365. Feb 2025. https://doi.org/10.1007/s10854-025-14404-y.
  • Deepjyoti Deb, Rupam Goswami, Ratul Kr Baruah., “Random Telegraph Noise Due to Dielectric-Semiconductor Interface Traps in MOS Transistors”. IEEE Transactions on Dielectrics and Electrical Insulation. Nov 2024. doi: 10.1109/TDEI.2024.3491672.
  • Prachuryya Subash Das, Dwipayan Nath, Deepjyoti Deb, Priyam Pathak, Hirakjyoti Choudhury, Rupam Goswami., “Mobility effects due to doping, temperature and interface traps in gate-all-around FinFETs”. Microsystem Technologies”. 20:1-3, Apr 2024. https://doi.org/10.1007/s00542-024-05637-8.
  • Priyam Pathak, Deepjyoti Deb, Dwipayan Nath, Prachuryya Subash Das, Hirakjyoti Choudhury, Rupam Goswami., “Incomplete Ionization-Dependent Carrier Mobility in Silicon-on-Insulator n-p-n Double-Gate Tunnel Field-Effect Transistors”. Electron. Mater. 53, 1142–1160, March 2024. https://doi.org/10.1007/s11664-023-10852-6. [Editor’s Choice]
  • Prachuryya Subash Das, Deepjyoti Deb, Rupam Goswami, Santanu Sharma, and Rajesh Saha, “Fin core dimensionality and corner effect in dual core gate-all-around FinFET,” Microelectronics Journal, vol. 143, p. 105985, Jan. 2024, doi: 10.1016/j.mejo.2023.105985.
  • Prachuryya Subash Das, Deepjyoti Deb, Rupam Goswami, Santanu Sharma, Rajesh Saha, Hirakjyoti Choudhury., “A dual core source/drain gaa finfet”. Tecnología en Marcha. Vol. 36, special issue. June, 2023. IEEE Latin American Electron Devices Conference (LAEDC). Page. 5-11.
  • Hirakjyoti Choudhury, Suvankar Paul, Deepjyoti Deb, Prachuryya Subash Das, Rupam Goswami., “A single Memristor-based TTL NOT logic”. Tecnología en Mar cha. Vol. 36, special issue. June, 2023. IEEE Latin American Electron Devices Conference (LAEDC). Page. 88-94.
  • Prajwalita Hazarika, Mrigashree Ray, Aditya Hazarika, Deepjyoti Deb, Prachuryya Subash Das, Hirakjyoti Choudhury, and Rupam Goswami., “Flatband voltage in MOS structures for spatial fixed oxide charge distributions,” Journal of Materials Science: Materials in Electronics, vol. 34, no. 15, May 2023, doi: 10.1007/s10854-023-10626-0.
  • Sujay Routh, Deepjyoti Deb, Ratul Kr Baruah, and Rupam Goswami., “Impact of high-temperature and interface traps on performance of a junctionless tunnel FET,” Silicon, vol. 15, no. 6, pp. 2703–2714, Nov. 2022, doi: 10.1007/s12633-022-02191-8.
  • Deepjyoti Deb, Rupam Goswami, Ratul Kr Baruah, Kavindra Kandpal, Rajesh Saha., “Parametric investigation and trap sensitivity of n-p-n double gate TFETs,” Computers & Electrical Engineering, vol. 100, p. 107930, May 2022, doi: 10.1016/j.compeleceng.2022.107930.
  • Deepjyoti Deb, Rupam Goswami, Ratul Kr Baruah, Kavindra Kandpal, Rajesh Saha., “Role of gate electrode in influencing interface trap sensitivity in SOI tunnel FETs,” Journal of Micromechanics and Microengineering, vol. 32, no. 4, p. 044006, Mar. 2022, doi: 10.1088/1361-6439/ac56e8.
  • Vikas Kumar,  Manoj Kumar Parida, Rupam Goswami., Deepjyoti Deb., “Model for predicting the threshold voltage of tunnel Field-Effect transistors using linear regression,” Journal of Electronic Materials, vol. 50, no. 11, pp. 6015–6019, Sep. 2021, doi: 10.1007/s11664-021-09189-9.

  • Deepjyoti Deb, Saurav Nath, Prachuryya Subash Das, Ratul Kr Baruah, Rupam Goswami., Lateral Straggle Based Interface Trap Sensitivity in npn SOI Double Gate TFETs. In2024 IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON) 2024 Nov 30 (pp. 264-268). IEEE.
  • Anirudh Koteshwar, Deepjyoti Deb, Shanidul Hoque, Rupam Goswami., “Analysis of Interface Trap Position Variation in Tunnel FETs”. In2024 IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON) 2024 Nov 30 (pp. 1-4). IEEE.
  • Dwipayan Nath, Deepjyoti Deb, Prachuryya Subash Das, Hirakjyoti Choudhury, Priyam Pathak and Rupam Goswami., “Impact of Doping and Temperature on Mobility in Single and Dual Core S/D GAA FinFETs,” 2023 IEEE Devices for Integrated Circuit (DevIC), Kalyani, India, 2023, pp. 392-395, doi: 10.1109/DevIC57758.2023.10134771. [Best Paper Award]
  • Sujay Routh, Deepjyoti Deb, Ratul Kr Baruah, and Rupam Goswami., “Junctionless Tunnel FET for High-Temperature Applications from an Analog Design Perspective,” 2022 IEEE International Conference on Nanoelectronics, Nanophotonics, Nanomaterials, Nanobioscience & Nanotechnology (5NANO), Kottayam, India, 2022, pp. 1-4, doi: 10.1109/5NANO53044.2022.9828986.
  • Deepjyoti Deb, Rupam Goswami, Ratul Kr Baruah, Kavindra Kandpal, Rajesh Saha., “An SOI n-p-n Double Gate TFET for Low Power Applications,” 2021 Devices for Integrated Circuit (DevIC), Kalyani, India, 2021, pp. 621-623, doi: 10.1109/DevIC50843.2021.9455827. [Best Paper Award]

  • Patent (01)
    Title: DOUBLE DRAWER MATCH BOX
    File No: 202231076570
    Status: Granted  on March 14, 2024
  • Design Registration (01)
    Title: BI-CONCAVE SHAPED DOUBLE DECKER MATCH BOX WITH VISIBLE WINDOW
    File No: 372595-001
    Status: Granted on July 14, 2023
  • Open Source Tools Developed (02)
    FlatB : A Software For Computational Tool  (2023)
    Inventors: Prajwalita Hazarika, Mrigashree Ray, Aditya Hazarika, Deepjyoti Deb, Prachuryya Subash Das, Hirakjyoti Choudhury, and Rupam Goswami.
    Repository: https://github.com/RupamG21/TSDL_FlatB
    Research URL: https://doi.org/10.1007/s10854-023-10626-0
  • RTN : An Algorithm To Generate RTN Using Poisson Inter-Arrival Times  (2024)
    Inventors: Deepjyoti Deb, Rupam Goswami and Ratul Kr Baruah.
    Repository: https://github.com/RupamG21/RTN
    Research URL: https://doi.org/10.1109/TDEI.2024.3491672

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  • Attended a worshop on “ Low- Power VLSI Design: Driving India’s Semiconductor Progress” held from 16th to 18th December 2024 organized by the Department of Electronics and Communication Engineering , Girijananda Chowdhury University, Assam.
  • Attended three days training program on “Nanotechnology based Sensor Design” organized by department of Electronics and Communication Engineering and Centre of Excellence in Nanotechnology, Assam Don Bosco University from 3rd to 5th March, 2022.
  • Attended hands-on training of online TCAD – Circuit Simulation Workshop, dually organized by IIT Bombay and Synopsys during August 1-5, 2022 organized by INUP-i2i, Synopsys.
  • Conducted a DST-SERB Sponsored “International Conference on Devices, Sensors and Systems (CoDSS) 2024” organized by the Department of Electronics and Communication Engineering , Tezpur University, India during February 10th -11th, 2024.
  • Conducted “ Hands-on Training Program on Computation, Fabrication, and Characterization of Devices and Systems” acted as a demonstrator of  Device Design in TCAD tool under “Synergistic Training Program Utilizing the Science  and Technology Infrastructure (STUTI)” organized by Department of Electronics and Communication Engineering , Tezpur University, India during June 13th -19th, 2022.
  • Presented a poster titled as “An SOI L-Body Double Gate TFET: RF Parameters and Interface Trap Analyses” in “International Symposium on Semiconductor Materials and Devices-2024 (ISSMD-2024)” hoisted and organized by Department of Physics , University of Kashmir, Srinagar, from  4th – 6th September 2024
  • Presented a my work titled as “Impact of Incomplete Ionization in Presence of Interface Traps in p-i-n TFET and n-p-n Double Gate TFET”  in “ International Symposium on Semiconductor Materials and Devices-2024 (ISSMD-2024)” hoisted and organized by Department of Physics , University of Kashmir, Srinagar, from  4th – 6th September 2024
  • Presented a poster titled as “Flatband voltage in MOS structures for spatial fixed oxide charge distributions” in “ International Symposium on Semiconductor Materials and Devices-2022 (ISSMD-2022)” held at School of Electronics Engineering , KIIT(Deemed to be University), Bhubaneswar, Odisha, India from 16th – 18th December 2022

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  • Working as an Assistant Professor in the Department of Electronics and Communication Engineering within SRMIST, Vadapalani, Chennai. (From July 2025 – till now)

  • Team Member – SemE-Hub (Nov. 2024 – Present)
  • Junior Research Fellow (JRF) (Sep. 16, 2021 – June 8, 2022)

  • Editor’s Choice for original research article in Journal of Electronic Materials (SpringerNature) in 2024
  • Best session paper award in 5th IEEE International Conference on Devices And Integrated Circuits (DevIC) 2023, Kalyani, India, 7-8 April 2023.
  • Best paper award in 4th IEEE International Conference on Devices and Integrated Circuits (DevIC) 2021, Kalyani, India, 19-20 May 2021.
  • Qualified Graduate Aptitude Test in Engineering (GATE) – 2020 in Electronics & Communication (EC) with a score of 316.

  • Has been a student member of IEEE (Membership No.: 98376377) since March, 2021
  • Has been a member of IEEE Electron Devices Society since January, 2023

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